zzh/2025-yatcpu
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33 Commits

Author SHA1 Message Date
handsomezhuzhu
04b9c80b1f lab4跑完 2025-11-19 13:59:50 +08:00
handsomezhuzhu
560a9add68 lab2全部完成 2025-11-18 20:10:24 +08:00
handsomezhuzhu
aa1a73202c 整理 2025-11-18 00:55:46 +08:00
handsomezhuzhu
464d19d647 lab4差MemoryTestF 2025-11-18 00:55:31 +08:00
PurplePower
aaa87c1fdf lab4 tutorial updated and imported some docs from orginal YatCPU docs 2025-08-25 22:03:10 +08:00
PurplePower
b9865cd612 Lab3 pipelined CPU renewed 
- added tutorial
- fix ID reg addr invalid in certain types of instructions
- renamed some variables for better understanding
 2025-08-14 16:55:53 +08:00
PurplePower
18c1327051 longer run time for fibonacci test 2024-11-20 18:15:40 +08:00
PurplePower
ea09ee5925 updated readmes and better printing 2024-11-19 01:47:50 +08:00
PurplePower
5c930b046c update clock_contrl.v for lab4 Z710 2024-11-19 01:29:05 +08:00
PurplePower
e4a4c6bf20 update clock_control.v for lab4 Z710 2024-11-19 01:17:53 +08:00
PurplePower
3abdb32f47 updates lab4 Top.scala for Z710v1.3 2024-11-19 01:11:30 +08:00
PurplePower
0f87b85f9f update Top.scala for z710v1.3 in lab3 and lab4 2024-11-19 00:50:11 +08:00
PurplePower
a64186bddb update z7-10 project scripts for other labs 2024-11-19 00:44:37 +08:00
PurplePower
8a3fae13fd updates 2024-11-19 00:25:58 +08:00
PurplePower
542c34ed46 updates Z7-10 for lab3 and lab4 2024-11-18 23:45:05 +08:00
PurplePower
0f905afe36 fixes 2024-11-18 23:17:58 +08:00
PurplePower
67896ab727 update csrc for correct UART printing with lower clock frequency 2024-11-18 17:06:23 +08:00
PurplePower
3e3c8ba6c0 board updates and fixes 
- now VCD is written in all tests by default, turn it on/off in TestAnnotations.scala
- updated cmakelists.txt
- added board program scripts and sources for Zynq 7000 v1.3 2024/02 board, lab1 only currently
 2024-11-18 10:50:45 +08:00
PurplePower
b3738b8f63 Updated z710 README and vitis script 
- skipped a redundant `paltform generate` in vitis_prj_run.tcl
- updated z710 README.md to be more detailed
 2024-01-19 15:40:51 +08:00
PurplePower
0a8f2ecffc updated readme for z710 board burning 2024-01-13 11:54:24 +08:00
PurplePower
ef4a567f22 Updated readme in z710 board burning 2024-01-13 11:34:17 +08:00
PurplePower
d79780a480 Fixed vivado script import path error 2023-12-27 14:01:29 +08:00
PurplePower
b7871a2c9b Update README.md 2023-12-26 23:00:45 +08:00
PurplePower
844cb062c2 Deleted useless verilog files 2023-12-26 01:18:54 +08:00
PurplePower
816f894007 added vivado-vitis uart workflow to lab4 
not yet tested
 2023-12-26 00:58:59 +08:00
PurplePower
bcd11625a6 Fixed generate bitstream bug 
copy not rename so vivado GUI still finds the .bit file
 2023-12-25 11:53:20 +08:00
PurplePower
2a6899729b Fixed Z7-10 generator duplicate file directory 2023-12-23 00:52:34 +08:00
TOKISAKIX\21168
cda1a478ed finished lab4 2023-12-11 23:44:26 +08:00
TOKISAKIX\21168
cfa7e2d2ab update lab4 2023-12-11 23:21:26 +08:00
TOKISAKIX\21168
606393b3b7 add lab4-file 2023-12-11 22:49:10 +08:00
TOKISAKIX\21168
2bce97ff4e add file 2023-12-11 22:20:48 +08:00
TOKISAKIX\21168
e720a0dfc2 add csrc 2023-12-11 21:54:53 +08:00
TOKISAKIX\21168
910ee11168 init repo 2023-12-11 21:50:22 +08:00