17 Commits

Author	SHA1	Message	Date
PurplePower	948b2e64f8	Added more tests for decoder	2024-11-07 22:38:53 +08:00
PurplePower	55aff2d301	Update Top.scala	2024-01-24 15:11:56 +08:00
PurplePower	b3738b8f63	Updated z710 README and vitis script ... - skipped a redundant `paltform generate` in vitis_prj_run.tcl - updated z710 README.md to be more detailed	2024-01-19 15:40:51 +08:00
PurplePower	0a8f2ecffc	updated readme for z710 board burning	2024-01-13 11:54:24 +08:00
PurplePower	ef4a567f22	Updated readme in z710 board burning	2024-01-13 11:34:17 +08:00
PurplePower	d79780a480	Fixed vivado script import path error	2023-12-27 14:01:29 +08:00
PurplePower	844cb062c2	Deleted useless verilog files	2023-12-26 01:18:54 +08:00
PurplePower	ffcc688d94	vivado-vitis uart workflow added for lab2	2023-12-25 20:50:54 +08:00
PurplePower	512d0d2b4c	Update generate_bitstream.tcl ... fixed tiny bug	2023-12-25 20:06:23 +08:00
PurplePower	85c4621957	updated vidado-vitis uart workflow scripts ... Generated Top.v can be burnt to Z7-10 board with these scripts with Vivado 2020.1, versions above should be OK. - vivado project now generates with just a single script - vitis project now runs with a single script	2023-12-25 17:10:17 +08:00
PurplePower	bcd11625a6	Fixed generate bitstream bug ... copy not rename so vivado GUI still finds the .bit file	2023-12-25 11:53:20 +08:00
PurplePower	2a6899729b	Fixed Z7-10 generator duplicate file directory	2023-12-23 00:52:34 +08:00
TOKISAKIX\21168	d7c8c1b030	finished lab1	2023-12-12 22:14:02 +08:00
TOKISAKIX\21168	72cb1aa15d	add lab1 file	2023-12-12 21:26:29 +08:00
TOKISAKIX\21168	2bce97ff4e	add file	2023-12-11 22:20:48 +08:00
TOKISAKIX\21168	e720a0dfc2	add csrc	2023-12-11 21:54:53 +08:00
TOKISAKIX\21168	910ee11168	init repo	2023-12-11 21:50:22 +08:00