PurplePower 3e3c8ba6c0 board updates and fixes ...

- now VCD is written in all tests by default, turn it on/off in TestAnnotations.scala
- updated cmakelists.txt
- added board program scripts and sources for Zynq 7000 v1.3 2024/02 board, lab1 only currently

2024-11-18 10:50:45 +08:00

..

basys3

init repo

2023-12-11 21:50:22 +08:00

pynq

init repo

2023-12-11 21:50:22 +08:00

verilator

init repo

2023-12-11 21:50:22 +08:00

z710

Deleted useless verilog files

2023-12-26 01:18:54 +08:00

z710v1.3

board updates and fixes

2024-11-18 10:50:45 +08:00