update Top.scala for z710v1.3 in lab3 and lab4

2026-02-20 20:10:14 +00:00 · 2024-11-19 00:50:11 +08:00
parent a64186bddb
commit 0f87b85f9f
2 changed files with 120 additions and 1 deletions
--- a/lab3/src/main/scala/board/z710v1.3/Top.scala
+++ b/lab3/src/main/scala/board/z710v1.3/Top.scala
@@ -97,7 +97,7 @@ class Top(binaryFilename: String = "say_goodbye.asmbin") extends Module {

 object VerilogGenerator extends App {
  (new ChiselStage).execute(
-    Array("-X", "verilog", "-td", "verilog/z710"), 
+    Array("-X", "verilog", "-td", "verilog/z710v1.3"), 
    Seq(ChiselGeneratorAnnotation(() => new Top("say_goodbye.asmbin")))   // program to run on CPU
  )
 }