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5ecb75157a5af1b95314cc08c1ed0abdac414d1a
2025-yatcpu/lab3/verilog/z710
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PurplePower 5ecb75157a added vivado-vitis uart workflow to lab3
2023-12-25 23:40:26 +08:00
..
clock_control.v
added vivado-vitis uart workflow to lab3
2023-12-25 23:40:26 +08:00
pass_through.v
add lab3 file
2023-12-12 22:24:33 +08:00
test.v
add lab3 file
2023-12-12 22:24:33 +08:00
Top_reset.v
add lab3 file
2023-12-12 22:24:33 +08:00
top_test.v
add lab3 file
2023-12-12 22:24:33 +08:00
uart_control.v
add lab3 file
2023-12-12 22:24:33 +08:00