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- skipped a redundant `paltform generate` in vitis_prj_run.tcl - updated z710 README.md to be more detailed
84 lines
2.9 KiB
Tcl
84 lines
2.9 KiB
Tcl
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set vivado_ws "./riscv-z710-v2020"
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set vitis_ws "./hello_z710-test"
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set vitis_prj_name "hello_z710"
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set hardware_name "design_1_wrapper"
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# set vitis workspace, ASSUMES you run this script in vivado/z710/
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setws $vitis_ws
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# create or activate hardware platform, then configure
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if {[file exists $vitis_ws/$hardware_name/platform.spr]} {
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puts "Found platform file, updating it"
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platform read $vitis_ws/$hardware_name/platform.spr
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platform active $hardware_name
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platform config -updatehw $vivado_ws/$hardware_name.xsa
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} else {
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puts "Creating platform from $vivado_ws/$hardware_name.xsa, make sure you have this file"
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# leave out "-out $vitis_ws" option for vitis 2020, which causes `platform list` found nothing, but still in the same place
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platform create -name $hardware_name -hw $vivado_ws/$hardware_name.xsa -proc {ps7_cortexa9_0} -os {standalone}
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platform write
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}
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platform active $hardware_name
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bsp config stdout ps7_uart_1
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bsp config stdin ps7_uart_1
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platform write
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# platform generate # redundant
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if {![file exists $vitis_ws/$vitis_prj_name]} {
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# create app project, using current active platform
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# app create -name $vitis_prj_name -proc {ps7_cortexa9_0} -os {standalone} -lang C -template {Hello World}
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app create -name $vitis_prj_name -platform $hardware_name -lang C -template {Hello World}
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# overwrite existing helloworld.c
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file copy -force helloworld.c $vitis_ws/$vitis_prj_name/src/helloworld.c
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}
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# build the project
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app build -name $vitis_prj_name
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# connect to default hw server @ 3121 and select target as ARM core 0
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# connect -host localhost -port 3121
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# connect alone can start hw_server and connect to it
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connect
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targets -set -nocase -filter {name =~ "ARM*#0"}
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# system reset
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rst -system
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# PS7 initialization, these steps are from Vitis IDE - Debug configuration(right click) - target setup
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# $hardware_name/hw/ps7_init.tcl is the same. init and post config are performed to enable PL-PS interaction
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#
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# Following operations will be performed before launching the debugger.
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# 1. Resets entire system. Clears the FPGA fabric (PL).
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# 2. Program FPGA fabric (PL).
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# 3. Runs ps7_init to initialize PS.
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# 4. Runs ps7_post_config. Enables level shifters from PL to PS. (Recommended to use this option only after system reset or board power ON).
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# 5. All processors in the system will be suspended, and Applications will be downloaded to the following processors as specified in the Applications tab.
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# 1) ps7_cortexa9_0 (E:\Workplace\2022-fall-yatcpu-repo\lab1\vivado\z710\hello-z710-v2020\hello_z710\Debug\hello_z710.elf)
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namespace eval xsdb "source $vitis_ws/$vitis_prj_name/_ide/psinit/ps7_init.tcl;ps7_init;ps7_post_config"
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# burn our CPU on FPGA
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fpga $vitis_ws/$hardware_name/hw/$hardware_name.bit
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# download ELF to PS
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dow $vitis_ws/$vitis_prj_name/Debug/$vitis_prj_name.elf
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# insert breakpoint at main
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# bpadd -addr &main
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con
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con
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