Commit Graph

6 Commits

Author SHA1 Message Date
PurplePower
ea09ee5925 updated readmes and better printing 2024-11-19 01:47:50 +08:00
PurplePower
0f905afe36 fixes 2024-11-18 23:17:58 +08:00
PurplePower
67896ab727 update csrc for correct UART printing with lower clock frequency 2024-11-18 17:06:23 +08:00
PurplePower
3e3c8ba6c0 board updates and fixes
- now VCD is written in all tests by default, turn it on/off in TestAnnotations.scala
- updated cmakelists.txt
- added board program scripts and sources for Zynq 7000 v1.3 2024/02 board, lab1 only currently
2024-11-18 10:50:45 +08:00
TOKISAKIX\21168
e720a0dfc2 add csrc 2023-12-11 21:54:53 +08:00
TOKISAKIX\21168
910ee11168 init repo 2023-12-11 21:50:22 +08:00