3 Commits

Author	SHA1	Message	Date
PurplePower	ddb70fa967	Fixing Z710 frequency TNS too large ... - now Z7-10 vivado project no longer copy files to local folder, so vivado can auto update it in generate_bitstream.tcl - Z7-10 clock freq is divided by 5 from 125MHz to 25MHz in clock_control.v - adds Zynq7000 v1.3 for lab2	2024-11-18 22:30:07 +08:00
PurplePower	d79780a480	Fixed vivado script import path error	2023-12-27 14:01:29 +08:00
PurplePower	85c4621957	updated vidado-vitis uart workflow scripts ... Generated Top.v can be burnt to Z7-10 board with these scripts with Vivado 2020.1, versions above should be OK. - vivado project now generates with just a single script - vitis project now runs with a single script	2023-12-25 17:10:17 +08:00