- added tutorial - fix ID reg addr invalid in certain types of instructions - renamed some variables for better understanding
- now VCD is written in all tests by default, turn it on/off in TestAnnotations.scala - updated cmakelists.txt - added board program scripts and sources for Zynq 7000 v1.3 2024/02 board, lab1 only currently
copy not rename so vivado GUI still finds the .bit file