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vivado-vitis uart workflow added for lab2

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PurplePower
2023-12-25 20:50:54 +08:00
parent 512d0d2b4c
commit ffcc688d94
12 changed files with 1365 additions and 1026 deletions
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8
lab2/vivado/z710/generate_bitstream.tcl
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@@ -54,8 +54,8 @@ while 1 {
wait_on_run impl_1
# copy the bitstream so vivado GUI still finds it
file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit
# this will export platform .xsz
write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa
# export hardware platform to Vitis
set_property pfm_name {} [get_files -all $project_dir/$project_name.srcs/sources_1/bd/design_1/design_1.bd]
write_hw_platform -fixed -include_bit -force -file $project_dir/design_1_wrapper.xsa