diff --git a/lab1/vivado/z710/generate_bitstream.tcl b/lab1/vivado/z710/generate_bitstream.tcl index 0a025be..4506c23 100644 --- a/lab1/vivado/z710/generate_bitstream.tcl +++ b/lab1/vivado/z710/generate_bitstream.tcl @@ -54,4 +54,8 @@ while 1 { wait_on_run impl_1 -file rename riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit \ No newline at end of file +# copy the bitstream so vivado GUI still finds it +file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit + +# this will export platform .xsz +write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa diff --git a/lab2/vivado/z710/generate_bitstream.tcl b/lab2/vivado/z710/generate_bitstream.tcl index 0a025be..4506c23 100644 --- a/lab2/vivado/z710/generate_bitstream.tcl +++ b/lab2/vivado/z710/generate_bitstream.tcl @@ -54,4 +54,8 @@ while 1 { wait_on_run impl_1 -file rename riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit \ No newline at end of file +# copy the bitstream so vivado GUI still finds it +file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit + +# this will export platform .xsz +write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa diff --git a/lab3/vivado/z710/generate_bitstream.tcl b/lab3/vivado/z710/generate_bitstream.tcl index 0a025be..4506c23 100644 --- a/lab3/vivado/z710/generate_bitstream.tcl +++ b/lab3/vivado/z710/generate_bitstream.tcl @@ -54,4 +54,8 @@ while 1 { wait_on_run impl_1 -file rename riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit \ No newline at end of file +# copy the bitstream so vivado GUI still finds it +file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit + +# this will export platform .xsz +write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa diff --git a/lab4/vivado/z710/generate_bitstream.tcl b/lab4/vivado/z710/generate_bitstream.tcl index 0a025be..4506c23 100644 --- a/lab4/vivado/z710/generate_bitstream.tcl +++ b/lab4/vivado/z710/generate_bitstream.tcl @@ -54,4 +54,8 @@ while 1 { wait_on_run impl_1 -file rename riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit \ No newline at end of file +# copy the bitstream so vivado GUI still finds it +file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit + +# this will export platform .xsz +write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa diff --git a/mini-yatcpu/src/main/scala/board/z710/z710/Top.scala b/mini-yatcpu/src/main/scala/board/z710/Top.scala similarity index 100% rename from mini-yatcpu/src/main/scala/board/z710/z710/Top.scala rename to mini-yatcpu/src/main/scala/board/z710/Top.scala diff --git a/mini-yatcpu/vivado/z710/generate_bitstream.tcl b/mini-yatcpu/vivado/z710/generate_bitstream.tcl index 0a025be..4506c23 100644 --- a/mini-yatcpu/vivado/z710/generate_bitstream.tcl +++ b/mini-yatcpu/vivado/z710/generate_bitstream.tcl @@ -54,4 +54,8 @@ while 1 { wait_on_run impl_1 -file rename riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit \ No newline at end of file +# copy the bitstream so vivado GUI still finds it +file copy riscv-z710/riscv-z710.runs/impl_1/design_1_wrapper.bit riscv-z710/riscv-z710.runs/impl_1/Top.bit + +# this will export platform .xsz +write_hw_platform -fixed -include_bit -force -file ./riscv-z710/Top.xsa