From b7578fdc840b47f88fe473b891bbe2b6a0601d79 Mon Sep 17 00:00:00 2001
From: handsomezhuzhu <2658601135@qq.com>
Date: Thu, 9 Oct 2025 19:32:03 +0800
Subject: [PATCH] =?UTF-8?q?=E5=AE=9E=E9=AA=8C=E4=B8=80=E7=9A=84=E6=89=A7?=
 =?UTF-8?q?=E8=A1=8C?=
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---
 lab1/src/main/scala/riscv/core/Execute.scala | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/lab1/src/main/scala/riscv/core/Execute.scala b/lab1/src/main/scala/riscv/core/Execute.scala
index c2b16a0..0ca0e39 100644
--- a/lab1/src/main/scala/riscv/core/Execute.scala
+++ b/lab1/src/main/scala/riscv/core/Execute.scala
@@ -47,9 +47,17 @@ class Execute extends Module {
   alu_ctrl.io.funct7 := funct7
 
   // lab1(Execute)
-
-
-
+  alu.io.func := alu_ctrl.io.alu_funct
+  alu.io.op1 := Mux(
+    io.aluop1_source === ALUOp1Source.Register,
+    io.reg1_data,
+    io.instruction_address
+  )
+  alu.io.op2 := Mux(
+    io.aluop2_source === ALUOp2Source.Register,
+    io.reg2_data,
+    io.immediate
+  )
 
 
   // lab1(Execute) end