From 1f43ccfcba51527d37f67d911d247c936d8a50a0 Mon Sep 17 00:00:00 2001 From: PurplePower <60787289+PurplePower@users.noreply.github.com> Date: Sat, 27 Sep 2025 00:03:50 +0800 Subject: [PATCH 01/15] added clock step for waveform in ID test --- .../riscv/singlecycle/InstructionDecoderTest.scala | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/lab1/src/test/scala/riscv/singlecycle/InstructionDecoderTest.scala b/lab1/src/test/scala/riscv/singlecycle/InstructionDecoderTest.scala index 6d950ae..4acf0ae 100644 --- a/lab1/src/test/scala/riscv/singlecycle/InstructionDecoderTest.scala +++ b/lab1/src/test/scala/riscv/singlecycle/InstructionDecoderTest.scala @@ -36,6 +36,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.wb_reg_write_source.expect(RegWriteSource.Memory) c.io.memory_read_enable.expect(true.B) c.io.memory_write_enable.expect(false.B) + c.clock.step() // InstructionTypes.S @@ -47,6 +48,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.regs_reg2_read_address.expect(10.U) c.io.memory_write_enable.expect(true.B) c.io.reg_write_enable.expect(false.B) + c.clock.step() // InstructionTypes.I, I-type instructions @@ -58,6 +60,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.reg_write_enable.expect(true.B) c.io.reg_write_address.expect(3.U) c.io.wb_reg_write_source.expect(RegWriteSource.ALUResult) + c.clock.step() // InstructionTypes.B, B-type instructions @@ -67,6 +70,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.ex_immediate.expect(16.U) c.io.regs_reg1_read_address.expect(2.U) c.io.regs_reg2_read_address.expect(4.U) + c.clock.step() // InstructionTypes.RM, R-type instructions @@ -77,6 +81,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.regs_reg2_read_address.expect(2.U) c.io.reg_write_enable.expect(true.B) c.io.reg_write_address.expect(3.U) + c.clock.step() // lui, U-type @@ -88,6 +93,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.reg_write_address.expect(5.U) c.io.ex_immediate.expect((2 << 12).U) c.io.wb_reg_write_source.expect(RegWriteSource.ALUResult) + c.clock.step() // jal, J-type @@ -98,6 +104,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.wb_reg_write_source.expect(RegWriteSource.NextInstructionAddress) c.io.reg_write_enable.expect(true.B) c.io.reg_write_address.expect(5.U) + c.clock.step() // jalr, I-type @@ -109,6 +116,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.wb_reg_write_source.expect(RegWriteSource.NextInstructionAddress) c.io.reg_write_enable.expect(true.B) c.io.reg_write_address.expect(5.U) + c.clock.step() // auipc, U-type @@ -119,7 +127,7 @@ class InstructionDecoderTest extends AnyFlatSpec with ChiselScalatestTester{ c.io.reg_write_enable.expect(true.B) c.io.reg_write_address.expect(2.U) c.io.wb_reg_write_source.expect(RegWriteSource.ALUResult) - + c.clock.step() } } From 3ab6723374ea9088f6fb62ef76608481f2ab50e4 Mon Sep 17 00:00:00 2001 From: PurplePower <60787289+PurplePower@users.noreply.github.com> Date: Sat, 27 Sep 2025 01:11:11 +0800 Subject: [PATCH 02/15] updated report questions for lab1 and lab2 --- .../docs/better-tut/labs/lab1/lab1-single-cycle-cpu.md | 10 +++++----- docs/docs/better-tut/labs/lab2/lab2-interrupt.md | 3 ++- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/docs/docs/better-tut/labs/lab1/lab1-single-cycle-cpu.md b/docs/docs/better-tut/labs/lab1/lab1-single-cycle-cpu.md index 2275586..df47ec0 100644 --- a/docs/docs/better-tut/labs/lab1/lab1-single-cycle-cpu.md +++ b/docs/docs/better-tut/labs/lab1/lab1-single-cycle-cpu.md @@ -288,12 +288,12 @@ CPUBundle 是 CPU 和内存等外设进行数据交换的通道。 -1. `src\test\scala\riscv\singlecycle` 中的测试文件 `ExecuteTest.scala`, `InstructionDecoderTest.scala` 和 `InstructionFetch.scala` 分别对相应部件进行单元测试，以确保单个部件的正确性。请您选择其中至少一个测试，并 - 1. 简述测试文件中的语句是如何测试部件正确性的； - 2. 在测试波形图上说明部件运行过程中关键信号的变化。 +1. `src\test\scala\riscv\singlecycle` 中的测试文件 `ExecuteTest.scala`, `InstructionDecoderTest.scala`（选择其中一类指令） 和 `InstructionFetch.scala` 分别对相应部件进行单元测试，以确保单个部件的正确性。请您选择其中至少一个测试，并 + 1. 简述测试文件中的语句是如何测试部件正确性的；如 `InstructionDecoderTest` 中对各类型指令均进行了测试，那对于 `L` 类指令，为何设置相应的 `expect` 值是那样的？ + 2. 在测试波形图上说明部件运行过程中关键信号的变化。如 `InstructionDecoderTest` 中的 `L` 类指令测试，找到其在波形图上的位置，并显示相应信号线的值。 2. 测试文件 `CPUTest.scala` 测试了整个 CPU 运行三个程序的正确性。请您选择其中至少一个程序的运行，并 - 1. 概述该程序做了什么，执行结果如何被检查； - 2. 在测试波形图上简单分析其执行，并说明检查执行结果时的波形。 + 1. 查看 `csrc` 文件夹下对应 C 文件的内容，概述该程序做了什么，执行结果如何在 Chisel 测试中被检查； + 2. 在测试波形图上简单分析其执行，并说明波形图最后几个周期检查执行结果时的波形。 3. 说明您在完成实验的过程中，遇到的实验指导不足或改进建议。