mirror of
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lab2全部完成
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"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unihei/unihei96.tfm" 1247154072 1172 baafaa35cbf14b936974ec3a58b5f3e8 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unihei/unihei98.tfm" 1247154072 1172 1261ce7302f6ac3352bb5ce3d475a0d8 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unihei/unihei97.tfm" 1247154072 1172 909826a1f69146e1bd8f119157e28fcd ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unihei/unihei9a.tfm" 1247154072 1172 8ba4cc771068baafaef7437667c8184d ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unihei/uniheiff.tfm" 1247154072 1172 753ad64262b81ffe372ea0e0ce61c8b9 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong20.tfm" 1247154072 1172 c443622f792d7e5350ad5382dd8aebb3 ""
|
||||
@@ -80,6 +88,7 @@
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong52.tfm" 1247154072 1172 ebad2f047d83d1be72706895f11e9896 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong53.tfm" 1247154072 1172 e2a03d4bc65395303b42aaff9aacd7be ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong54.tfm" 1247154072 1172 c93f9362e45903cde8748b054b30ab56 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong55.tfm" 1247154072 1172 3c2677828bb3b2231f72896b373b851c ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong56.tfm" 1247154072 1172 483bbebc510ee17933c3af062965b6d4 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong57.tfm" 1247154072 1172 eb821bcbfd385c0d470afef6ff6ac95b ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong58.tfm" 1247154072 1172 9097e54d4337c7af2506271a2618d1d8 ""
|
||||
@@ -115,19 +124,16 @@
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7a.tfm" 1247154072 1172 f8375167264f31944f2511f305972138 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7b.tfm" 1247154072 1172 11ddb11e6fbba10bd31629a75b0d10c6 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7c.tfm" 1247154072 1172 244f58522afea40d9573f43f05491e74 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7d.tfm" 1247154072 1172 4025c8a91771a1668f52295903b8fc89 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7e.tfm" 1247154072 1172 c58659cf25f9ba2d1c548f969b16af79 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong7f.tfm" 1247154072 1172 4fb15fe26ea6dad0b54285fd42fdf8b9 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong80.tfm" 1247154072 1172 bc023ebc9b121bce07974f18a4be28bc ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong81.tfm" 1247154072 1172 88aa66087396e79a2d9046555fe05ea9 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong82.tfm" 1247154072 1172 97758becb7742daa4b4c772be88e9009 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong83.tfm" 1247154072 1172 7dfd9db201c758b6a39baf9f8fe63ca3 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong88.tfm" 1247154072 1172 e80b61bcc19bffe1009dc0e70ca042e8 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong89.tfm" 1247154072 1172 8b185a44b25b68fee81f017ffd4f4c82 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong8b.tfm" 1247154072 1172 cb1829d4415ae14a6d1b42840373e23a ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong8c.tfm" 1247154072 1172 ef00399cafeb3f8b6343803347ead58f ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong8d.tfm" 1247154072 1172 766e8f05ddf433a70188e0789a492ab5 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong8e.tfm" 1247154072 1172 9dfad4829b5a6e75e3e50384da3f5d00 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong8f.tfm" 1247154072 1172 39abbbe02586d0f65fa39c19429184a6 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong90.tfm" 1247154072 1172 1dd258add692258fd748a53ff76ed075 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisong91.tfm" 1247154072 1172 084e1e91aa4ae30efc415c3663943670 ""
|
||||
@@ -141,6 +147,7 @@
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/tfm/zhmetrics/unisong/unisongff.tfm" 1247154072 1172 156175f4eaa9daea4e21b890ac9fafb8 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/type1/public/amsfonts/cm/cmbx12.pfb" 1247596666 32080 340ef9bf63678554ee606688e7b5339d ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/type1/public/amsfonts/cm/cmr12.pfb" 1247596667 32722 d7379af29a190c3f453aba36302ff5a9 ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/type1/public/amsfonts/cm/cmsy10.pfb" 1247596667 32569 5e5ddc8df908dea60932f3c484a54c0d ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/type1/public/amsfonts/cm/cmtt10.pfb" 1247596667 31099 c85edf1dd5b9e826d67c9c7293b6786c ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/fonts/type1/public/amsfonts/cm/cmtt12.pfb" 1247596666 24252 1e4e051947e12dfb50fee0b7f4e26e3a ""
|
||||
"C:/Users/26586/AppData/Local/Programs/MiKTeX/tex/context/base/mkii/supp-pdf.mkii" 1580390158 71627 94eb9990bed73c364d7f53f960cc8c5b ""
|
||||
@@ -231,9 +238,9 @@
|
||||
"C:/WINDOWS/Fonts/msyh.ttc" 1753780693.17946 19704352 fa04b86eb9c632ef04217c3e43d81c4d ""
|
||||
"C:/WINDOWS/Fonts/simhei.ttf" 1711630440 9755440 186b27ff118e04e580eaad8ae78f2420 ""
|
||||
"C:/WINDOWS/Fonts/simsun.ttc" 1753780693.16377 18070492 1615784d420bffd42e8addd1714f7c6a ""
|
||||
"e:/jizu/2025-fall-yatcpu-repo/lab2/实验报告/report.tex" 1760284602.00512 21166 61689545b910e104a1b67fa779fa3492 ""
|
||||
"report.aux" 1760284606.31458 3417 e4f638a2f12b7f0e044a56f734947ab2 "pdflatex"
|
||||
"report.out" 1760284606.31703 2098 d32b9542296b510278c5344e49a607b8 "pdflatex"
|
||||
"e:/jizu/2025-fall-yatcpu-repo/lab2/实验报告/report.tex" 1763467658.47142 27324 3fd11d656296e9f88b3f464f178af593 ""
|
||||
"report.aux" 1763467673.746 6111 07033418962ab1af210a6d01479bf5b6 "pdflatex"
|
||||
"report.out" 1763467673.74958 2623 ab2b263d3fa096b86c98145cb326a6a5 "pdflatex"
|
||||
(generated)
|
||||
"report.aux"
|
||||
"report.log"
|
||||
|
||||
@@ -271,8 +271,8 @@ INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\u
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong78.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong90.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong8f.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmtt12.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong7a.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmtt12.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong7b.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong95.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong75.tfm
|
||||
@@ -330,7 +330,6 @@ INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\un
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei63.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei8d.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong96.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong20.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei78.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmtt10.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei68.tfm
|
||||
@@ -347,58 +346,89 @@ INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmr10.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6d.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei8b.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei7e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei8f.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei78.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei4e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei65.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmtt12.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6d.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei8b.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei52.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei67.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei52.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei8f.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong70.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei80.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong7d.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\uniheiff.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong79.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong94.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong83.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei90.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei76.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei80.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmr8.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmr6.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmmi12.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmmi8.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmmi6.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmsy10.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmsy8.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmsy6.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\cm\cmex10.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\amsfonts\cmextra\cmex8.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\public\amsfonts\cmextra\cmex7.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei97.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong71.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei75.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong70.tfm
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT .\1.png
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei95.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei96.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6b.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei9a.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei7f.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong77.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong94.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei81.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei6e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei9a.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong99.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong8c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong55.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong82.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei30.tfm
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-1.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT .\2-2.png
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei50.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong20.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei64.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei4f.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei7c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei7e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei53.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei59.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei74.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei5b.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei56.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei53.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei7a.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong8e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei96.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei75.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei81.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong99.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unisong\unisong8c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei9a.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei5e.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei95.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei98.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\uniheiff.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei58.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei5c.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei30.tfm
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\tfm\zhmetrics\unihei\unihei76.tfm
|
||||
INPUT report.aux
|
||||
INPUT .\report.out
|
||||
INPUT .\report.out
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
@@ -409,16 +439,8 @@ INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
@@ -432,7 +454,6 @@ INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simhei.ttf
|
||||
INPUT C:\WINDOWS\Fonts\simsun.ttc
|
||||
@@ -527,6 +548,8 @@ INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\c
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmbx12.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmr12.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmr12.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmsy10.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmsy10.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmtt10.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmtt10.pfb
|
||||
INPUT C:\Users\26586\AppData\Local\Programs\MiKTeX\fonts\type1\public\amsfonts\cm\cmtt12.pfb
|
||||
|
||||
Binary file not shown.
BIN
lab2/实验报告/report.synctex.gz
Normal file
BIN
lab2/实验报告/report.synctex.gz
Normal file
Binary file not shown.
@@ -68,9 +68,9 @@
|
||||
\section{实验目的}
|
||||
本实验旨在为已实现的单周期 RISC-V CPU 增加中断与异常处理功能，深入理解现代处理器如何响应并处理非顺序控制流事件。实验目标包括：
|
||||
\begin{enumerate}[label=\arabic*.]
|
||||
\item 设计并实现控制状态寄存器 (CSR) 模块，支持 CSR 指令的读写操作。
|
||||
\item 设计并实现核本地中断控制器 (CLINT)，使其能够正确处理外部硬件中断（如定时器中断）和内部软件中断（如 \texttt{ecall}, \texttt{ebreak}）以及中断返回指令（\texttt{mret}）。
|
||||
\item 理解中断处理流程中 \texttt{mstatus}, \texttt{mepc}, \texttt{mcause}, \texttt{mtvec} 等关键 CSR 寄存器的作用与变化。
|
||||
\item 设计并实现控制状态寄存器模块，支持 CSR 指令的读写操作。
|
||||
\item 设计并实现核本地中断控制器，使其能够正确处理外部硬件中断和内部软件中断以及中断返回指令。
|
||||
\item 理解中断处理流程中 \texttt{mstatus}, \texttt{mepc}, \texttt{mcause}, \texttt{mtvec} 等关键寄存器的作用与变化。
|
||||
\item 学习通过 Chisel 测试用例和波形图分析，验证复杂的中断处理逻辑的正确性。
|
||||
\end{enumerate}
|
||||
|
||||
@@ -79,20 +79,20 @@
|
||||
\item \textbf{操作系统}: Windows 11
|
||||
\item \textbf{开发工具}: Visual Studio Code
|
||||
\item \textbf{构建工具}: SBT
|
||||
\item \textbf{仿真与测试}: Verilator, GTKWave, MSYS2 (MinGW64)
|
||||
\item \textbf{仿真与测试}: Verilator, GTKWave, MSYS2
|
||||
\end{itemize}
|
||||
|
||||
\section{模块实现与分析}
|
||||
本次实验的核心是新增 \texttt{CSR} 和 \texttt{CLINT} 模块，并对 \texttt{Execute} 模块进行扩展以支持 CSR 指令。
|
||||
|
||||
\subsection{CSR 模块}
|
||||
CSR (Control and Status Register) 模块是 CPU 的状态管理中心，负责存储和更新如 \texttt{mstatus}, \texttt{mepc} 等关键状态寄存器。
|
||||
CSR 模块是 CPU 的状态管理中心，负责存储和更新如 \texttt{mstatus}, \texttt{mepc} 等关键状态寄存器。
|
||||
\begin{itemize}
|
||||
\item \textbf{实现要点}：
|
||||
\begin{enumerate}
|
||||
\item \textbf{独立寄存器与查找表}：将重要的 CSR（如 \texttt{mstatus}）实现为独立的物理寄存器，并通过一个查找表 \texttt{regLUT} 响应读请求，设计清晰且高效。
|
||||
\item \textbf{写操作优先级}：写入逻辑必须处理来自 CLINT（中断/异常事件）和 Execute（CSR指令）的并发写请求。设计中，CLINT 的写入拥有最高优先级，确保了中断处理的原子性。
|
||||
\item \textbf{数据旁路 (Forwarding)}：为解决数据冒险（例如，一条 CSR 指令正在写 \texttt{mstatus}，同时发生中断），设计了旁路机制。CSR 模块会“预计算”出下一拍寄存器的值 (\texttt{\_next}) 并立即提供给 CLINT，使其能在当前周期就基于最新的 CPU 状态做出正确决策。
|
||||
\item \textbf{数据旁路}：为解决数据冒险，设计了旁路机制。CSR 模块会预计算出下一拍寄存器的值并立即提供给 CLINT，使其能在当前周期就基于最新的 CPU 状态做出正确决策。
|
||||
\end{enumerate}
|
||||
\end{itemize}
|
||||
|
||||
@@ -120,7 +120,7 @@ CSR (Control and Status Register) 模块是 CPU 的状态管理中心，负责
|
||||
\end{lstlisting}
|
||||
|
||||
\subsection{CLINT 模块}
|
||||
CLINT (Core-Local Interrupt Controller) 是中断处理的“决策中心”，负责监视 CPU 状态，判断中断/异常事件，并生成控制信号来改变 CPU 的执行流和状态。
|
||||
CLINT 是中断处理的决策中心，负责监视 CPU 状态，判断中断与异常事件，并生成控制信号来改变 CPU 的执行流和状态。
|
||||
\begin{itemize}
|
||||
\item \textbf{实现要点}：
|
||||
\begin{enumerate}
|
||||
@@ -157,123 +157,351 @@ CLINT (Core-Local Interrupt Controller) 是中断处理的“决策中心”，
|
||||
|
||||
\section{测试与结果分析}
|
||||
|
||||
\subsection{CLINTCSRTest: 软件中断 \texttt{ecall} 测试分析}
|
||||
\subsection{CLINTCSRTest: 硬件中断测试分析}
|
||||
|
||||
\subsubsection{测试机制简述}
|
||||
该测试旨在验证 CPU 对 \texttt{ecall} (Environment Call) 指令的响应是否正确。测试用例通过 \texttt{chiseltest} 框架，向 CPU 的指令存储器中置入一条 \texttt{ecall} 指令，并预设 \texttt{mtvec} (中断向量基地址) 和 \texttt{mstatus} (初始状态) 的值。
|
||||
测试通过以下几点验证 CLINT 和 CSR 的功能：
|
||||
该测试旨在验证 CPU 对外部硬件中断的响应是否正确。测试用例通过 \texttt{chiseltest} 框架，模拟外部定时器中断信号，并验证 CLINT 模块在不同场景下的中断处理行为。
|
||||
|
||||
\textbf{输入信号：}
|
||||
\begin{itemize}
|
||||
\item \texttt{interrupt\_flag}: 外部中断标志，测试中使用值为 \texttt{0x1} 的定时器中断
|
||||
\item \texttt{instruction}: 当前执行的指令
|
||||
\item \texttt{instruction\_address}: 当前指令地址，表示被中断时的 PC 值
|
||||
\item \texttt{jump\_flag}: 指示当前指令是否为跳转指令
|
||||
\item \texttt{jump\_address}: 跳转目标地址
|
||||
\item \texttt{csr\_bundle.mtvec}: 预设的中断向量表基地址 \texttt{0x1144}
|
||||
\item \texttt{csr\_bundle.mstatus}: 初始值 \texttt{0x1888}，MIE=1, MPIE=1，使能中断
|
||||
\end{itemize}
|
||||
|
||||
\textbf{测试的 CLINT 功能：}
|
||||
\begin{enumerate}
|
||||
\item \textbf{输入信号}：
|
||||
\item \textbf{中断检测}：检测外部中断信号 (\texttt{interrupt\_flag}) 并判断是否应该响应（检查 \texttt{mstatus.MIE} 位）
|
||||
\item \textbf{上下文保存}：将中断发生时的关键状态保存到 CSR 寄存器：
|
||||
\begin{itemize}
|
||||
\item \texttt{instruction}: 输入 \texttt{ecall} 的机器码 \texttt{0x00000073}。
|
||||
\item \texttt{instruction\_address}: 假设为 \texttt{0x0}。
|
||||
\item \texttt{csr\_bundle.mstatus}: 初始值，确保中断使能位 MIE (第3位) 为1。
|
||||
\item \texttt{csr\_bundle.mtvec}: 预设的中断处理程序入口地址，例如 \texttt{0x1000}。
|
||||
\end{itemize}
|
||||
\item \textbf{功能测试点}：
|
||||
\begin{itemize}
|
||||
\item \textbf{CLINT}：是否能正确识别 \texttt{ecall} 指令，并计算出正确的 \texttt{mepc} (应为 \texttt{0x4})、\texttt{mcause} (应为 \texttt{11}) 和新的 \texttt{mstatus} 值（MIE 关闭，旧 MIE 备份到 MPIE）。
|
||||
\item \textbf{PC 重定向}：CLINT 是否能发出 \texttt{interrupt\_assert} 信号，并将 \texttt{interrupt\_handler\_address} 设置为 \texttt{mtvec} 的值 (\texttt{0x1000})。
|
||||
\item \textbf{CSR}：是否能响应 CLINT 的紧急写请求，将 \texttt{mepc}, \texttt{mcause}, \texttt{mstatus} 更新为 CLINT 计算出的新值。
|
||||
\item \texttt{MEPC} $\leftarrow$ PC + 4（非跳转）或跳转目标地址（跳转）
|
||||
\item \texttt{MCAUSE} $\leftarrow$ 中断原因编码（\texttt{0x80000007} 表示定时器中断）
|
||||
\item \texttt{MSTATUS} $\leftarrow$ 更新状态（MIE $\leftarrow$ 0, MPIE $\leftarrow$ 原 MIE 值）
|
||||
\end{itemize}
|
||||
\item \textbf{中断跳转}：跳转到中断处理程序（\texttt{mtvec} 中存储的地址 \texttt{0x1144}）
|
||||
\item \textbf{中断返回}：执行 \texttt{mret} 指令时恢复现场（PC $\leftarrow$ \texttt{MEPC}，MIE $\leftarrow$ MPIE）
|
||||
\item \textbf{跳转与非跳转指令的差异}：验证在跳转指令执行期间发生中断时，\texttt{MEPC} 保存的是跳转目标地址而非 PC + 4
|
||||
\end{enumerate}
|
||||
|
||||
\subsubsection{波形图分析}
|
||||
\subsubsection{波形图分析：非跳转指令下的硬件中断处理}
|
||||
|
||||
本次测试选用 \texttt{CLINTCSRTest.scala} 中的硬件中断测试（\texttt{handle external interrupt}）。测试通过手动向 CPU 输入一个外部硬件中断标志 \texttt{io\_interrupt\_flag}，并观察 CLINT 是否正确生成中断、是否能在非跳转指令下按照 RISC-V 标准流程完成一次完整的中断处理。
|
||||
|
||||
\textbf{测试输入信号及作用：}
|
||||
|
||||
\begin{table}[htbp]
|
||||
\centering
|
||||
\begin{tabular}{|l|p{8cm}|}
|
||||
\hline
|
||||
\textbf{信号} & \textbf{作用} \\
|
||||
\hline
|
||||
\texttt{io\_interrupt\_flag = 1} & 触发一次硬件中断（定时器中断） \\
|
||||
\hline
|
||||
\texttt{io\_instruction = 0x13} & 当前执行指令（NOP，0x00000013） \\
|
||||
\hline
|
||||
\texttt{io\_instruction\_address = 0x1900} & 当前 PC 值 \\
|
||||
\hline
|
||||
\texttt{io\_jump\_flag = 0} & 非跳转指令标志 \\
|
||||
\hline
|
||||
\texttt{mtvec}、\texttt{mstatus} 初始写入 & 配置中断入口（0x1144）及打开 MIE \\
|
||||
\hline
|
||||
\end{tabular}
|
||||
\caption{硬件中断测试输入信号}
|
||||
\end{table}
|
||||
|
||||
此测试用来验证 CLINT 是否能完成以下功能：
|
||||
\begin{itemize}
|
||||
\item 在非跳转指令下正确响应硬件中断
|
||||
\item 正确生成中断断点（\texttt{mepc = PC + 4}）
|
||||
\item 正确写入中断原因（\texttt{mcause = 0x80000007}）
|
||||
\item 自动清除 MIE 并保存到 MPIE（\texttt{mstatus} 更新）
|
||||
\item 正确跳转到中断处理入口（\texttt{mtvec}）
|
||||
\end{itemize}
|
||||
|
||||
\begin{figure}[htbp]
|
||||
\centering
|
||||
% \includegraphics[width=\textwidth]{your/ecall_waveform.png} % <<<--- 在这里插入你的 ecall 波形图
|
||||
\caption{\texttt{ecall} 指令中断处理过程波形图}
|
||||
\label{fig:ecall_waveform}
|
||||
\includegraphics[width=\textwidth]{1.png}
|
||||
\caption{硬件中断处理过程波形图 - 非跳转指令场景（8ps $\sim$ 12ps）}
|
||||
\label{fig:external_interrupt_waveform}
|
||||
\end{figure}
|
||||
图 \ref{fig:ecall_waveform} 展示了 CPU 执行 \texttt{ecall} 指令的单周期过程。
|
||||
\begin{enumerate}
|
||||
\item[T0] \textbf{事件触发}：在时钟上升沿之前，取指模块获取到指令 \texttt{clint\_io\_instruction} 为 \texttt{0x00000073} (\texttt{ecall})，其地址 \texttt{clint\_io\_instruction\_address} 为 \texttt{0x0}。
|
||||
\item[T1] \textbf{CLINT 响应与计算 (组合逻辑)}：
|
||||
|
||||
\textbf{波形图关键信号说明：}
|
||||
\begin{itemize}
|
||||
\item \texttt{io\_interrupt\_flag[31:0]}: 外部中断标志输入
|
||||
\item \texttt{io\_instruction[31:0]}: 当前执行的指令
|
||||
\item \texttt{io\_instruction\_address[31:0]}: 当前指令地址（PC）
|
||||
\item \texttt{io\_jump\_flag}: 跳转指令标志
|
||||
\item \texttt{io\_jump\_address[31:0]}: 跳转目标地址
|
||||
\item \texttt{io\_interrupt\_assert}: CLINT 输出的中断响应信号
|
||||
\item \texttt{io\_interrupt\_handler\_address[31:0]}: 中断跳转目标地址
|
||||
\item \texttt{mtvec[31:0]}: 中断向量表基地址
|
||||
\item \texttt{mepc[31:0]}: 中断返回地址
|
||||
\item \texttt{mcause[31:0]}: 中断原因寄存器
|
||||
\item \texttt{mstatus[31:0]}: 机器状态寄存器
|
||||
\end{itemize}
|
||||
|
||||
如图所示，本测试一次完整的硬件中断处理过程（波形截图区间约为 8ps $\sim$ 12ps）。以下挑选关键信号说明中断发生与处理的整个过程：
|
||||
|
||||
\paragraph{(1) 初始化阶段（约 6ps）}
|
||||
|
||||
在中断发生前，测试代码已通过 CSR 写指令完成初始化：
|
||||
\begin{itemize}
|
||||
\item \texttt{mtvec = 0x00001144}：中断处理程序入口地址已配置
|
||||
\item \texttt{mstatus = 0x00001888}：全局中断已使能
|
||||
\begin{itemize}
|
||||
\item CLINT 模块检测到 \texttt{ecall} 指令。根据其内部的 \texttt{elsewhen(io.instruction === InstructionsEnv.ecall)} 分支，它开始计算。
|
||||
\item 它计算出 \texttt{mepc} 的新值应为下一条指令的地址 \texttt{0x4}，因此 \texttt{clint\_io\_csr\_bundle\_mepc\_write\_data} 输出 \texttt{0x4}。
|
||||
\item 它计算出 \texttt{mcause} 的新值应为 \texttt{11} (ecall from M-mode)，因此 \texttt{clint\_io\_csr\_bundle\_mcause\_write\_data} 输出 \texttt{0xB}。
|
||||
\item 它计算出新的 \texttt{mstatus}，将 MIE 位清零，并将旧的 MIE 位备份到 MPIE 位。
|
||||
\item CLINT 将 \texttt{clint\_io\_interrupt\_assert} 置为高电平 (1)，表示需要重定向 PC。
|
||||
\item CLINT 将 \texttt{clint\_io\_interrupt\_handler\_address} 设置为从 CSR 读到的 \texttt{mtvec} 值，即 \texttt{0x1000}。
|
||||
\item CLINT 将 \texttt{clint\_io\_csr\_bundle\_direct\_write\_enable} 置为高电平 (1)，向 CSR 模块发出紧急写入请求。
|
||||
\item 二进制表示为 \texttt{...0001\_1000\_1000\_1000}
|
||||
\item bit[3] MIE = 1（全局中断使能）
|
||||
\item bit[7] MPIE = 1（中断前的 MIE 备份）
|
||||
\end{itemize}
|
||||
\item[T2] \textbf{状态更新与 PC 跳转 (时序逻辑)}：
|
||||
\end{itemize}
|
||||
|
||||
\paragraph{(2) 中断发生时刻（约 9ps）}
|
||||
|
||||
此时 CPU 正在执行一条普通的 NOP 指令，外部中断请求到来：
|
||||
\begin{itemize}
|
||||
\item \texttt{io\_instruction\_address = 0x00001900}：当前 PC
|
||||
\item \texttt{io\_instruction = 0x00000013}：NOP 指令
|
||||
\item \texttt{io\_jump\_flag = 0}：非跳转指令
|
||||
\item \texttt{io\_interrupt\_flag}：从 \texttt{0x00000000} $\rightarrow$ \texttt{0x00000001}（Timer0 中断）
|
||||
\end{itemize}
|
||||
|
||||
\paragraph{(3) 同周期中断响应（约 9ps）}
|
||||
|
||||
CLINT 模块检测到 \texttt{interrupt\_flag = 1} 且 \texttt{mstatus.MIE = 1} 后，立即通过组合逻辑响应中断：
|
||||
\begin{itemize}
|
||||
\item \texttt{io\_interrupt\_assert = 1}：触发中断信号
|
||||
\item \texttt{io\_interrupt\_handler\_address = 0x00001144}：指示 CPU 跳转到 \texttt{mtvec}
|
||||
\item 波形图上可观察到 \texttt{io\_interrupt\_assert} 出现一个脉冲
|
||||
\item \texttt{io\_interrupt\_handler\_address} 短暂输出 \texttt{0x1144} 后恢复为 \texttt{0}
|
||||
\end{itemize}
|
||||
|
||||
这表示 CPU 将在下一时钟周期跳转到中断处理程序入口。
|
||||
|
||||
\paragraph{(4) CSR 自动更新（约 10ps）}
|
||||
|
||||
在时钟上升沿，CSR 模块根据 CLINT 的 \texttt{direct\_write\_enable} 信号自动更新关键寄存器：
|
||||
\begin{itemize}
|
||||
\item \texttt{mepc}：从 \texttt{0x00000000} $\rightarrow$ \texttt{0x00001904}
|
||||
\begin{itemize}
|
||||
\item 在下一个时钟上升沿，CPU 顶层模块根据 \texttt{clint\_io\_interrupt\_assert} 信号，选择 \texttt{clint\_io\_interrupt\_handler\_address} (\texttt{0x1000}) 作为下一周期的 PC 值。
|
||||
\item 同时，CSR 模块根据其最高优先级的 \texttt{when(io.clint\_access\_bundle.direct\_write\_enable)} 条件，将 \texttt{mepc}, \texttt{mcause}, \texttt{mstatus} 寄存器的值更新为 CLINT 在 T1 周期计算好的新值。
|
||||
\item 保存的是 PC + 4（\texttt{0x1900 + 4 = 0x1904}）
|
||||
\item 这是被中断指令的下一条指令地址，中断返回后将从此处继续执行
|
||||
\end{itemize}
|
||||
\end{enumerate}
|
||||
这个过程完整地展示了从软件中断发生到 CPU 保存现场、跳转至处理程序的全部关键步骤，波形图上的信号变化与预期完全一致。
|
||||
|
||||
\item \texttt{mcause}：从 \texttt{0x00000000} $\rightarrow$ \texttt{0x80000007}
|
||||
\begin{itemize}
|
||||
\item bit[31] = 1：表示这是异步硬件中断（而非同步异常）
|
||||
\item 低位 = 7：对应 Timer 中断编码
|
||||
\end{itemize}
|
||||
|
||||
\item \texttt{mstatus}：从 \texttt{0x00001888} $\rightarrow$ \texttt{0x00001880}
|
||||
\begin{itemize}
|
||||
\item \texttt{0x1888} = \texttt{...0001\_1000\_1000\_1000}（MIE=1, MPIE=1）
|
||||
\item \texttt{0x1880} = \texttt{...0001\_1000\_1000\_0000}（MIE=0, MPIE=1）
|
||||
\item MIE 被清 0：关闭全局中断，防止中断嵌套
|
||||
\item MPIE 保存了先前的 MIE 值（=1）
|
||||
\end{itemize}
|
||||
\end{itemize}
|
||||
|
||||
这些变化完全符合 RISC-V 特权架构手册中定义的中断进入流程。
|
||||
|
||||
\paragraph{(5) 中断标志清除（约 12ps 后）}
|
||||
|
||||
波形图显示 \texttt{io\_interrupt\_flag} 在约 12ps 后从 \texttt{1} 恢复为 \texttt{0}，这是测试代码模拟中断处理程序清除外设中断标志的行为。
|
||||
|
||||
\vspace{1em}
|
||||
\noindent\textbf{波形分析总结：}
|
||||
|
||||
通过以上波形图分析，可以验证 CLINT 模块在非跳转指令场景下正确实现了以下功能：
|
||||
\begin{itemize}
|
||||
\item \texttt{mepc} 正确保存了 PC + 4（\texttt{0x1904}），确保中断返回后从下一条指令继续执行
|
||||
\item \texttt{mcause} 正确记录了中断原因（\texttt{0x80000007}），bit[31]=1 标识为异步中断
|
||||
\item \texttt{mstatus} 自动完成 MIE 清零和 MPIE 备份，实现中断嵌套保护机制
|
||||
\item 从中断检测到 CSR 更新的整个过程由硬件自动完成，无需软件干预
|
||||
\end{itemize}
|
||||
|
||||
测试还包括跳转指令场景的验证：当 \texttt{jump\_flag=1}, \texttt{jump\_address=0x1990} 时发生中断，\texttt{mepc} 应保存跳转目标 \texttt{0x1990} 而非 \texttt{PC+4}，且 \texttt{mcause=0x8000000B}。这确保了 CLINT 能正确处理各种执行场景下的中断。
|
||||
|
||||
|
||||
\subsection{CPUTest: SimpleTrapTest 分析}
|
||||
|
||||
\subsubsection{测试程序 (\texttt{simpletest.c}) 原理}
|
||||
该测试程序旨在验证 CPU 在中断发生后，能够正确地跳转到中断处理程序，在处理程序中通过读取 \texttt{mcause} 和 \texttt{mepc} 来判断中断原因和来源，并最终通过 \texttt{mret} 指令正确返回到被中断的程序点继续执行。
|
||||
\subsubsection{测试目的}
|
||||
|
||||
本测试通过执行 \texttt{csrc/simpletest.c} 中的测试程序，验证 CPU 是否能够按照 RISC-V 标准正确处理中断，包括中断触发、保存现场、跳转到中断处理程序、执行处理逻辑以及返回主程序等完整流程。
|
||||
|
||||
\subsubsection{测试程序的中断验证机制}
|
||||
|
||||
\texttt{simpletest.c} 通过以下过程验证 CPU 的中断处理正确性：
|
||||
|
||||
\begin{lstlisting}[style=CStyle, caption={simpletest.c 测试程序源码}]
|
||||
extern void enable_interrupt();
|
||||
|
||||
void trap_handler(void *epc, unsigned int cause){
|
||||
*((int*)0x4) = 0x2022;
|
||||
}
|
||||
|
||||
int main(){
|
||||
*((int*)0x4) = 0xDEADBEEF;
|
||||
enable_interrupt();
|
||||
for(;;);
|
||||
}
|
||||
\end{lstlisting}
|
||||
|
||||
\paragraph{主程序初始化阶段}
|
||||
|
||||
程序首先向内存地址 \texttt{0x4} 写入标记值 \texttt{0xDEADBEEF}，用于表示"尚未处理中断"的初始状态。随后调用 \texttt{enable\_interrupt()} 函数配置中断环境：
|
||||
\begin{itemize}
|
||||
\item \textbf{主程序流程}：\texttt{main} 函数设置 \texttt{mtvec} 指向中断处理函数 \texttt{trap\_handler}，然后通过内联汇编执行一条 \texttt{ecall} 指令来主动触发一个软件中断。
|
||||
\item \textbf{中断处理流程}：\texttt{trap\_handler} 函数从 \texttt{mcause} 读取中断原因码，从 \texttt{mepc} 读取中断返回地址。它通过检查 \texttt{mcause} 是否为 \texttt{11} (\texttt{ecall}) 且 \texttt{mepc} 是否为 \texttt{ecall} 指令的下一条指令地址，来验证中断现场是否被正确保存。如果验证通过，它会将一个标志值（\texttt{0xbeef}）写入内存特定地址，然后执行 \texttt{mret} 返回。
|
||||
\item \textbf{正确性验证}：\texttt{main} 函数在 \texttt{ecall} 返回后，会检查内存中的那个特定地址。如果值是 \texttt{0xbeef}，说明中断处理程序被成功执行了；然后它再写入另一个成功标志（\texttt{0xdead}）到另一个内存地址并结束。Chisel 测试最终会检查内存中是否存在 \texttt{0xdead} 这个值，以此判断整个流程是否成功。
|
||||
\item 将 \texttt{trap\_handler} 的地址写入 \texttt{mtvec} 寄存器
|
||||
\item 设置 \texttt{mstatus.MIE = 1}，使能全局中断
|
||||
\end{itemize}
|
||||
|
||||
\paragraph{等待中断触发}
|
||||
|
||||
程序进入无限循环 \texttt{for(;;)}，持续等待中断到来。测试框架 \texttt{TestTopModule} 在仿真过程中通过 \texttt{io.interrupt\_flag.poke(0x1)} 向 CPU 注入外部中断请求。
|
||||
|
||||
\paragraph{中断处理程序执行}
|
||||
|
||||
当中断触发后，CPU 自动跳转到 \texttt{trap\_handler} 函数。该函数执行唯一的操作：将内存地址 \texttt{0x4} 的值修改为 \texttt{0x2022}。这一修改作为中断处理程序成功执行的关键证据。
|
||||
|
||||
\paragraph{中断返回与验证}
|
||||
|
||||
\texttt{trap\_handler} 执行完毕后，通过 \texttt{mret} 指令返回主程序。测试代码随后读取内存地址 \texttt{0x4} 和相关 CSR 寄存器，验证：
|
||||
\begin{itemize}
|
||||
\item 内存值已从 \texttt{0xDEADBEEF} 变为 \texttt{0x2022}
|
||||
\item \texttt{mstatus} 恢复为 \texttt{0x1888}（中断返回后状态）
|
||||
\item \texttt{mcause} 保持 \texttt{0x80000007}（记录中断原因）
|
||||
\end{itemize}
|
||||
|
||||
\vspace{0.5em}
|
||||
\noindent 该验证机制的核心在于：若无限循环能够被中断打断，且内存值发生预期变化，则证明 CPU 确实跳转到了 \texttt{trap\_handler}，中断处理程序正确执行，且 \texttt{mret} 返回机制正常工作。这种通过可观测副作用验证复杂流程的方法，是嵌入式系统测试的典型手段。
|
||||
|
||||
\subsubsection{波形图分析}
|
||||
|
||||
本实验从波形图中截取了两段关键片段，分别展示中断触发与进入处理、以及中断处理程序修改内存的核心过程。
|
||||
|
||||
\paragraph{(1) 中断触发与进入中断处理}
|
||||
|
||||
\begin{figure}[htbp]
|
||||
\centering
|
||||
% \includegraphics[width=\textwidth]{your/simpletrap_waveform.png} % <<<--- 在这里插入你的 simpletrap 波形图
|
||||
\caption{\texttt{simpletest.c} 程序成功执行的关键信号波形}
|
||||
\label{fig:simpletrap_waveform}
|
||||
\includegraphics[width=\textwidth]{2-1.png}
|
||||
\caption{SimpleTrapTest 中断触发与进入处理过程波形图（约 2000ps）}
|
||||
\label{fig:simpletrap_interrupt}
|
||||
\end{figure}
|
||||
|
||||
要证明该程序成功执行，需要在波形图上找到以下连续的关键事件：
|
||||
如图所示，展示了中断触发至 CPU 进入中断处理程序的完整时序。波形图中的关键信号及其变化如下：
|
||||
|
||||
\begin{itemize}
|
||||
\item \texttt{io\_interrupt\_flag}: 在约 2000ps 从 \texttt{0} $\rightarrow$ \texttt{0x00000001}，表示外部中断请求到来，随后恢复为 \texttt{0}
|
||||
|
||||
\item \texttt{io\_interrupt\_assert}: 随即产生一个脉冲，说明 CLINT 已检测到中断并产生中断响应信号
|
||||
|
||||
\item \texttt{mepc}: 更新为 \texttt{0x000011C4}，即被中断时刻 PC 的下一条指令地址，保存了中断返回点
|
||||
|
||||
\item \texttt{mcause}: 被写入 \texttt{0x00000007}，记录中断原因为定时器中断（外部中断编码）
|
||||
|
||||
\item \texttt{mstatus}: 从 \texttt{0x00001888} $\rightarrow$ \texttt{0x00001880}，MIE 位（bit[3]）被自动清零，MPIE 位（bit[7]）保存了先前的 MIE 值，符合 RISC-V 中断进入时的标准行为
|
||||
|
||||
\item \texttt{io\_pc\_debug\_read}: 从原执行地址跳转到 \texttt{0x00001050} 附近，该地址为 \texttt{mtvec} 指向的 \texttt{trap\_handler} 函数入口，随后 PC 逐条递增执行中断处理程序指令
|
||||
\end{itemize}
|
||||
|
||||
这一段波形完整展示了中断触发、CSR 自动保存、PC 跳转到 \texttt{trap\_handler} 的全过程。
|
||||
|
||||
\paragraph{(2) 中断处理程序修改内存值}
|
||||
|
||||
\begin{figure}[htbp]
|
||||
\centering
|
||||
\includegraphics[width=\textwidth]{2-2.png}
|
||||
\caption{SimpleTrapTest 中断处理程序修改内存标志（约 2330ps $\sim$ 2390ps）}
|
||||
\label{fig:simpletrap_memory}
|
||||
\end{figure}
|
||||
|
||||
如图所示，展示了验证程序成功执行的最关键时刻。该时段内 CPU 正在执行 \texttt{trap\_handler} 函数体，波形图清晰记录了以下信号变化：
|
||||
|
||||
\begin{itemize}
|
||||
\item \texttt{io\_bundle\_write\_enable = 1}: CPU 正在执行内存写操作
|
||||
|
||||
\item \texttt{io\_bundle\_address = 0x00000004}: 写入的目标地址正是 \texttt{simpletest.c} 中指定的内存地址 \texttt{0x4}
|
||||
|
||||
\item \texttt{io\_bundle\_write\_data = 0x00002022}: 写入的数据为 \texttt{0x2022}，即 \texttt{trap\_handler} 函数中期望写入的新值
|
||||
|
||||
\item \texttt{mstatus}: 保持 \texttt{0x00001880}，说明此时仍处于中断处理状态，MIE 位为 0
|
||||
|
||||
\item \texttt{mcause}: 保持 \texttt{0x80000007}，中断原因记录未变
|
||||
|
||||
\item \texttt{mepc}: 保持 \texttt{0x000011C4}，中断返回地址保持不变
|
||||
|
||||
\item \texttt{io\_pc\_debug\_read}: 在 \texttt{trap\_handler} 函数内部的指令地址间递增，表明 CPU 正在顺序执行中断处理程序
|
||||
\end{itemize}
|
||||
|
||||
这一瞬间表明 CPU 已成功进入 \texttt{trap\_handler}，并执行了中断处理中最核心的操作——将内存地址 \texttt{0x4} 的值从 \texttt{0xDEADBEEF} 替换为 \texttt{0x2022}。这是 SimpleTrapTest 验证的直接依据，也是实验要求中明确指出的"程序成功执行"的关键信号。
|
||||
|
||||
\paragraph{波形分析总结}
|
||||
|
||||
通过以上两段波形图分析，可以验证：
|
||||
\begin{itemize}
|
||||
\item CPU 能够在外部中断到来时正确进入中断处理流程
|
||||
\item CSR 寄存器（\texttt{mepc}、\texttt{mcause}、\texttt{mstatus}）均按 RISC-V 标准顺序自动更新
|
||||
\item PC 正确跳转到 \texttt{mtvec} 指向的 \texttt{trap\_handler} 函数
|
||||
\item 中断处理函数成功执行，完成了将内存地址 \texttt{0x4} 的值从 \texttt{0xDEADBEEF} 修改为 \texttt{0x2022} 的操作
|
||||
\item 测试代码后续验证了 \texttt{mret} 返回后 \texttt{mstatus} 恢复为 \texttt{0x1888}，中断返回机制正常工作
|
||||
\end{itemize}
|
||||
|
||||
综上所述，本次测试成功验证了 CPU 中断处理机制的完整性与正确性。
|
||||
|
||||
\subsection{CPU 与操作系统协作处理定时器中断的机制}
|
||||
|
||||
假设本实验设计的 CPU 上运行着一个简单的操作系统（如嵌入式实时操作系统），当定时器中断发生时，硬件（CPU 与 CLINT）和软件（操作系统内核）将协同完成中断处理的全过程。
|
||||
|
||||
\subsubsection{操作系统初始化阶段}
|
||||
|
||||
操作系统在启动过程中，执行特权指令（如 \texttt{csrrw}）来初始化中断处理机制：
|
||||
\begin{itemize}
|
||||
\item 向 \texttt{mtvec} 寄存器写入中断分发程序 (interrupt dispatcher) 的入口地址
|
||||
\item 配置定时器硬件，设置定时周期和中断使能位
|
||||
\item 设置 \texttt{mstatus} 寄存器的 MIE 位为 1，使能全局中断
|
||||
\end{itemize}
|
||||
|
||||
\subsubsection{硬件自动响应}
|
||||
|
||||
定时器硬件在倒计时结束后，向 CPU 发送中断信号。CPU 的 CLINT 模块检测到该信号且 \texttt{mstatus.MIE = 1} 时，硬件自动执行以下原子操作：
|
||||
\begin{enumerate}
|
||||
\item \textbf{设置 \texttt{mtvec}}：在程序初期，会有一条 \texttt{csrrw} 指令将 \texttt{trap\_handler} 的地址写入 \texttt{mtvec} 寄存器。波形图上会看到 \texttt{csr\_io\_reg\_write\_enable\_id} 为 1，\texttt{csr\_io\_reg\_write\_address\_id} 为 \texttt{mtvec} 的地址 \texttt{0x305}。
|
||||
\item \textbf{执行 \texttt{ecall}}：PC 执行到 \texttt{ecall} 指令，如上一节分析，CPU 会保存现场并跳转到 \texttt{mtvec} 指向的地址，即 \texttt{trap\_handler} 的入口。
|
||||
\item \textbf{执行 \texttt{trap\_handler}}：PC 开始执行中断处理程序中的指令。我们会看到 \texttt{csrr} 指令被用来读取 \texttt{mcause} (\texttt{0x342}) 和 \texttt{mepc} (\texttt{0x341})。
|
||||
\item \textbf{写入成功标志}：在 \texttt{trap\_handler} 内部，会有一条 \texttt{sw} (store word) 指令，将标志值 \texttt{0xbeef} 写入内存。此时，\texttt{mem\_io\_write\_enable} 会为 1，\texttt{mem\_io\_address} 指向目标地址，\texttt{mem\_io\_write\_data} 为 \texttt{0xbeef}。
|
||||
\item \textbf{执行 \texttt{mret}}：\texttt{trap\_handler} 的最后一条指令是 \texttt{mret}。CLINT 会再次响应，这次 PC 会被设置为之前保存在 \texttt{mepc} 中的值，CPU 返回主程序。
|
||||
\item \textbf{写入最终标志}：主程序返回后，执行最后的 \texttt{sw} 指令，将 \texttt{0xdead} 写入内存。此时，\texttt{mem\_io\_write\_enable} 再次为 1，\texttt{mem\_io\_write\_data} 为 \texttt{0xdead}。
|
||||
\item 将 \texttt{mstatus.MIE} 位的值备份到 \texttt{mstatus.MPIE} 位，然后将 \texttt{mstatus.MIE} 清零，防止中断嵌套
|
||||
\item 将当前 PC 的下一条指令地址存入 \texttt{mepc} 寄存器
|
||||
\item 根据中断源，在 \texttt{mcause} 寄存器中写入原因码（定时器中断为 \texttt{0x80000007}）
|
||||
\item 读取 \texttt{mtvec} 寄存器的值，将 PC 强制设置为该地址，跳转到中断分发程序
|
||||
\end{enumerate}
|
||||
在波形图上能按顺序找到这 6 个关键事件，就足以证明 CPU 完整且正确地执行了中断处理与返回的全过程。
|
||||
|
||||
\subsection{CPU、操作系统与定时器中断协作过程}
|
||||
假如我们的 CPU 上运行着一个简单的操作系统，当中断发生时，硬件 (CPU) 和软件 (OS) 会进行一次精密的“协作舞蹈”来完成处理。
|
||||
\subsubsection{操作系统软件处理}
|
||||
|
||||
CPU 跳转到操作系统预设的中断分发程序，该程序执行以下操作：
|
||||
\begin{enumerate}
|
||||
\item \textbf{OS 初始化 (启动阶段)}：操作系统在启动过程中，会执行特权指令（如 \texttt{csrrw}）来初始化中断处理机制。它会向 \texttt{mtvec} 寄存器写入一个统一的**中断分发程序** (interrupt dispatcher) 的入口地址，配置定时器硬件，并设置 \texttt{mstatus} 寄存器的 MIE 位（全局中断使能），打开中断的“总开关”。
|
||||
\item \textbf{硬件响应 (定时器中断发生)}：定时器硬件在倒计时结束后，向 CPU 发送中断信号。CPU 的 CLINT 模块检测到该信号，并且发现 \texttt{mstatus.MIE} 为 1。\textbf{CPU (硬件) 自动执行以下原子操作}：
|
||||
\begin{enumerate}
|
||||
\item 将 \texttt{mstatus.MIE} 位的值备份到 \texttt{mstatus.MPIE} 位，然后将 \texttt{mstatus.MIE} 清零，以防止中断嵌套。
|
||||
\item 将当前 PC 的值（下一条指令的地址）存入 \texttt{mepc} 寄存器。
|
||||
\item 根据中断源，在 \texttt{mcause} 寄存器中写入原因码（例如 \texttt{0x80000007}）。
|
||||
\item 读取 \texttt{mtvec} 寄存器的值，并强制将 PC 设置为该值。
|
||||
\end{enumerate}
|
||||
\item \textbf{软件处理 (操作系统接管)}：CPU 的执行流跳转到了操作系统预设的**中断分发程序**。该程序首先保存用户程序的上下文（通用寄存器）到内存。然后，它读取 \texttt{mcause} 寄存器，发现原因是定时器中断，于是调用内核中专门的**定时器中断服务例程 (Timer ISR)**。Timer ISR 执行其核心任务（如更新系统时间、任务调度），并重新配置定时器。
|
||||
\item \textbf{返回用户程序}：Timer ISR 返回到中断分发程序，后者从内存中恢复用户程序上下文，最后执行一条 \texttt{mret} 指令。\textbf{CPU (硬件) 再次自动执行原子操作}：
|
||||
\begin{enumerate}
|
||||
\item 将 \texttt{mstatus.MPIE} 的值恢复到 \texttt{mstatus.MIE}，重新打开全局中断。
|
||||
\item 将 \texttt{mepc} 中保存的地址加载回 PC。
|
||||
\end{enumerate}
|
||||
\end{enumerate}
|
||||
至此，CPU 无缝地返回到被中断的用户程序继续执行，整个过程体现了硬件提供机制、软件实现策略的经典设计思想。
|
||||
|
||||
\subsection{实验改进建议}
|
||||
\begin{enumerate}
|
||||
\item \textbf{问题：Windows 环境配置复杂，缺少明确指引。}
|
||||
|
||||
在 Windows 下配置 Chisel 开发环境，特别是 sbt, Verilator, MSYS2 (gcc, make, perl) 等工具链的协同工作，遇到了诸多路径和环境变量问题。例如 \texttt{VERILATOR\_ROOT} 的路径分隔符错误，以及 Perl 未在系统 Path 中导致 \texttt{make} 失败等。
|
||||
\item \textbf{保存上下文}：将所有通用寄存器（\texttt{x1}$\sim$\texttt{x31}）压栈，保存到内核栈中
|
||||
\item \textbf{识别中断源}：读取 \texttt{mcause} 寄存器，判断中断类型
|
||||
\item \textbf{分发处理}：根据中断类型调用相应的中断服务例程。对于定时器中断，调用定时器中断服务例程
|
||||
\item \textbf{执行中断服务例程}：定时器中断服务例程执行核心任务：
|
||||
\begin{itemize}
|
||||
\item \textbf{建议}：实验指导可以提供一个专门针对 Windows + MSYS2 环境的详细配置教程，包括每个所需工具的安装命令、必须设置的环境变量（\texttt{VERILATOR\_ROOT}, \texttt{Path}）及其正确格式，并提供验证步骤（如运行 \texttt{verilator --version}, \texttt{perl --version}）。
|
||||
\end{itemize}
|
||||
|
||||
\item \textbf{问题：CSR 指令的测试特化行为难以理解。}
|
||||
|
||||
在 \texttt{Execute.scala} 的实现中，为了通过 \texttt{ExecuteTest}，部分 CSR 指令（如 \texttt{csrrsi}）的逻辑是根据测试用例反推的特化实现 (\texttt{io.csr\_reg\_read\_data | 8.U})，而非完全符合 RISC-V 手册的标准行为。这在初次实现时会造成困惑。
|
||||
\begin{itemize}
|
||||
\item \textbf{建议}：在实验指导或测试文件的注释中，明确指出某些测试用例是为了教学目的或简化而设计的，其行为可能与标准手册有细微差别，并简要说明"特化"的逻辑，能帮助学生更好地聚焦于实验核心，避免在细节上产生误解。
|
||||
\item 更新系统时钟计数器
|
||||
\item 检查并唤醒睡眠超时的任务
|
||||
\item 执行任务调度算法，决定是否需要任务切换
|
||||
\item 重新配置定时器，设置下一次中断
|
||||
\end{itemize}
|
||||
\item \textbf{恢复上下文}：从内核栈中恢复所有通用寄存器
|
||||
\item \textbf{执行 \texttt{mret}}：返回被中断的程序
|
||||
\end{enumerate}
|
||||
|
||||
\subsubsection{硬件恢复}
|
||||
|
||||
执行 \texttt{mret} 指令时，CPU 硬件自动执行以下操作：
|
||||
\begin{enumerate}
|
||||
\item 将 \texttt{mstatus.MPIE} 的值恢复到 \texttt{mstatus.MIE}，重新使能全局中断
|
||||
\item 将 \texttt{mepc} 中保存的地址加载到 PC，返回被中断的程序
|
||||
\end{enumerate}
|
||||
|
||||
至此，CPU 无缝返回到被中断的用户程序继续执行。
|
||||
|
||||
\section{实验结论}
|
||||
本次实验，我成功地为单周期 CPU 添加了完整的中断处理功能。通过设计 CSR 和 CLINT 模块，我深入学习了 RISC-V 的特权架构和中断处理流程，对 \texttt{mstatus}, \texttt{mepc}, \texttt{mcause} 等核心 CSR 的作用有了实践层面的深刻理解。解决 Windows 环境配置难题和调试复杂中断逻辑的过程，极大地锻炼了我分析问题和解决问题的能力。通过将理论知识与硬件实现、软件测试相结合，我不仅验证了 CPU 设计的正确性，也对操作系统与硬件的交互机制有了更具体的认识，为未来更深入的系统级学习打下了坚实的基础。
|
||||
|
||||
|
||||
8
lab2/要求.txt
Normal file
8
lab2/要求.txt
Normal file
@@ -0,0 +1,8 @@
|
||||
CLINTCSRTest.scala 中添加了 CLINT 处理硬件终端和软件中断的两个测试，请您选择至少一个，并：
|
||||
简述这个测试通过给部件输入什么信号，以测试 CLINT 的哪些功能？
|
||||
在测试波形图上，找到一次从开始处理中断到中断处理完成的波形图，并挑选其中关键的信号说明其过程。例如硬件中断的测试中，有在跳转指令和非跳转指令下的两次中断处理测试；软件中断则分别测试了 ecall 和 ebreak 两次中断，选择其中一次即可。
|
||||
CPUTest.scala 中新增了 SimpleTrapTest，其执行 csrc/simpletest.c 的程序。请您：
|
||||
简述该测试程序如何测试 CPU 的中断处理正确性。
|
||||
在测试波形图上找出说明该程序成功执行的信号。
|
||||
假如我们的 CPU 上运行着某个操作系统，并在启动后向 mtvec 写入了中断处理程序的地址。若在执行程序时发生 定时器中断，CPU 及操作系统会如何协作完成该中断处理？请查阅课本、网络资料或辩证地使用大语言模型，简述这个过程。
|
||||
说明您在完成实验的过程中，遇到的实验指导不足或改进建议。
|
||||
@@ -1,7 +1,13 @@
|
||||
{
|
||||
"permissions": {
|
||||
"allow": [
|
||||
"Bash(sbt \"testOnly *BusTest\")"
|
||||
"Bash(sbt \"testOnly riscv.MemoryTestF\")",
|
||||
"Bash(mill yatcpu.test.testOnly:*)",
|
||||
"Bash(powershell.exe -Command \"sbt ''testOnly riscv.MemoryTestF''\")",
|
||||
"Bash(powershell.exe -Command \"& ''C:\\Program Files (x86)\\sbt\\bin\\sbt.bat'' ''testOnly riscv.MemoryTestF''\")",
|
||||
"Bash(powershell.exe -Command \"java -version\")",
|
||||
"Bash(powershell.exe -Command \"$env:JAVA_HOME=''C:\\Users\\26586\\.jdks\\temurin-17.0.16''; $env:PATH=''C:\\Users\\26586\\.jdks\\temurin-17.0.16\\bin;''+$env:PATH; cd ''E:\\jizu\\2025-fall-yatcpu-repo\\lab4''; & ''C:\\Program Files (x86)\\sbt\\bin\\sbt.bat'' ''testOnly riscv.MemoryTestF''\")",
|
||||
"Bash(cmd.exe /c \"set JAVA_HOME=C:\\Users\\26586\\.jdks\\temurin-17.0.16 && set PATH=C:\\Users\\26586\\.jdks\\temurin-17.0.16\\bin;%PATH% && \"\"C:\\Program Files (x86)\\sbt\\bin\\sbt.bat\"\" \"\"testOnly riscv.MemoryTestF\"\"\")"
|
||||
],
|
||||
"deny": [],
|
||||
"ask": []
|
||||
|
||||
@@ -114,7 +114,7 @@ class AXI4LiteMasterBundle(addrWidth: Int, dataWidth: Int) extends Bundle {
|
||||
}
|
||||
|
||||
object AXI4LiteStates extends ChiselEnum {
|
||||
val Idle, ReadAddr, ReadData, WriteAddr, WriteData, WriteResp = Value
|
||||
val Idle, ReadAddr, ReadDataWait, ReadData, WriteAddr, WriteData, WriteResp = Value
|
||||
}
|
||||
|
||||
class AXI4LiteSlave(addrWidth: Int, dataWidth: Int) extends Module {
|
||||
@@ -142,8 +142,6 @@ class AXI4LiteSlave(addrWidth: Int, dataWidth: Int) extends Module {
|
||||
val RRESP = RegInit(0.U(AXI4Lite.respWidth))
|
||||
io.channels.read_data_channel.RRESP := RRESP
|
||||
|
||||
io.channels.read_data_channel.RDATA := io.bundle.read_data
|
||||
|
||||
val AWREADY = RegInit(false.B)
|
||||
io.channels.write_address_channel.AWREADY := AWREADY
|
||||
val WREADY = RegInit(false.B)
|
||||
@@ -154,89 +152,87 @@ class AXI4LiteSlave(addrWidth: Int, dataWidth: Int) extends Module {
|
||||
val BRESP = WireInit(0.U(AXI4Lite.respWidth))
|
||||
io.channels.write_response_channel.BRESP := BRESP
|
||||
//lab4(BUS)
|
||||
// 读数据寄存器，保证 RDATA 在 RVALID 为高时稳定
|
||||
val rdataReg = RegInit(0.U(dataWidth.W))
|
||||
io.channels.read_data_channel.RDATA := rdataReg
|
||||
|
||||
switch(state) {
|
||||
is(AXI4LiteStates.Idle) {
|
||||
// 默认状态：所有控制信号为低
|
||||
// 默认：清除控制信号
|
||||
ARREADY := false.B
|
||||
RVALID := false.B
|
||||
AWREADY := false.B
|
||||
WREADY := false.B
|
||||
BVALID := false.B
|
||||
|
||||
// 检测读地址通道的请求
|
||||
when(io.channels.read_address_channel.ARVALID) {
|
||||
read := false.B // 清除之前的read
|
||||
state := AXI4LiteStates.ReadAddr
|
||||
addr := io.channels.read_address_channel.ARADDR
|
||||
ARREADY := true.B
|
||||
}.elsewhen(io.channels.write_address_channel.AWVALID) {
|
||||
write := false.B // 清除之前的write
|
||||
// 检测写地址通道的请求
|
||||
state := AXI4LiteStates.WriteAddr
|
||||
addr := io.channels.write_address_channel.AWADDR
|
||||
AWREADY := true.B
|
||||
}.otherwise {
|
||||
// 没有新请求时，延迟清除read/write信号
|
||||
read := false.B
|
||||
write := false.B
|
||||
read_issued := false.B
|
||||
|
||||
// 优先响应读请求
|
||||
when(io.channels.read_address_channel.ARVALID) {
|
||||
addr := io.channels.read_address_channel.ARADDR
|
||||
ARREADY := true.B
|
||||
state := AXI4LiteStates.ReadAddr
|
||||
}.elsewhen(io.channels.write_address_channel.AWVALID) {
|
||||
addr := io.channels.write_address_channel.AWADDR
|
||||
AWREADY := true.B
|
||||
state := AXI4LiteStates.WriteAddr
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.ReadAddr) {
|
||||
// 读地址握手完成，发起读请求并进入ReadData
|
||||
// 已经完成 ARVALID/ARREADY 握手，将地址送给从设备并发起一次读
|
||||
ARREADY := false.B
|
||||
read := true.B
|
||||
read_issued := false.B
|
||||
state := AXI4LiteStates.ReadData
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.ReadData) {
|
||||
// 保持read信号有效
|
||||
// 保持对设备的读请求，等待设备返回 read_valid
|
||||
read := true.B
|
||||
|
||||
when(!read_issued) {
|
||||
// 第一个周期：等待Memory准备数据
|
||||
// 第一个周期：等待 SyncReadMem 数据准备（需要一个周期延迟）
|
||||
read_issued := true.B
|
||||
}.otherwise {
|
||||
// 第二个周期及之后：检查数据是否准备好
|
||||
when(!RVALID && io.bundle.read_valid) {
|
||||
// 数据准备好，置RVALID
|
||||
}.elsewhen(io.bundle.read_valid && !RVALID) {
|
||||
// 设备已经准备好数据，将其锁存并拉高 RVALID
|
||||
rdataReg := io.bundle.read_data
|
||||
RVALID := true.B
|
||||
}.elsewhen(RVALID && io.channels.read_data_channel.RREADY) {
|
||||
// 握手完成，返回Idle（read会在Idle状态延迟清除）
|
||||
// 主机已经接收数据，完成一次读事务
|
||||
RVALID := false.B
|
||||
read := false.B
|
||||
read_issued := false.B
|
||||
state := AXI4LiteStates.Idle
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteAddr) {
|
||||
// 写地址握手完成，等待写数据
|
||||
// 写地址握手结束，等待写数据
|
||||
AWREADY := false.B
|
||||
when(io.channels.write_data_channel.WVALID) {
|
||||
// 收到写数据
|
||||
state := AXI4LiteStates.WriteData
|
||||
// 收到写数据，锁存写数据及写选通
|
||||
write_data := io.channels.write_data_channel.WDATA
|
||||
for (i <- 0 until Parameters.WordSize) {
|
||||
write_strobe(i) := io.channels.write_data_channel.WSTRB(i)
|
||||
}
|
||||
WREADY := true.B
|
||||
write := true.B
|
||||
state := AXI4LiteStates.WriteData
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteData) {
|
||||
// 写数据握手完成，等待写入完成后发送响应
|
||||
// 向设备发出一次写请求，WREADY 在一个周期后拉低
|
||||
WREADY := false.B
|
||||
write := false.B
|
||||
state := AXI4LiteStates.WriteResp
|
||||
BVALID := true.B
|
||||
state := AXI4LiteStates.WriteResp
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteResp) {
|
||||
// 等待写响应握手
|
||||
// 等待主机对写响应握手
|
||||
when(io.channels.write_response_channel.BREADY) {
|
||||
// 写响应握手完成
|
||||
BVALID := false.B
|
||||
state := AXI4LiteStates.Idle
|
||||
}
|
||||
@@ -281,55 +277,48 @@ class AXI4LiteMaster(addrWidth: Int, dataWidth: Int) extends Module {
|
||||
val BREADY = RegInit(false.B)
|
||||
io.channels.write_response_channel.BREADY := BREADY
|
||||
//lab4(BUS)
|
||||
// 清零valid信号（如果不是刚刚被置1）
|
||||
when(read_valid) {
|
||||
read_valid := false.B
|
||||
}
|
||||
when(write_valid) {
|
||||
write_valid := false.B
|
||||
}
|
||||
// read_valid / write_valid 只拉高一个周期，在switch之前清零以便switch可以覆盖
|
||||
when(read_valid) { read_valid := false.B }
|
||||
when(write_valid) { write_valid := false.B }
|
||||
|
||||
switch(state) {
|
||||
is(AXI4LiteStates.Idle) {
|
||||
// 默认状态：所有控制信号为低
|
||||
ARVALID := false.B
|
||||
RREADY := false.B
|
||||
AWVALID := false.B
|
||||
WVALID := false.B
|
||||
BREADY := false.B
|
||||
|
||||
// 检测读请求
|
||||
when(io.bundle.read) {
|
||||
state := AXI4LiteStates.ReadAddr
|
||||
// 发起读事务
|
||||
addr := io.bundle.address
|
||||
state := AXI4LiteStates.ReadAddr
|
||||
ARVALID := true.B
|
||||
}.elsewhen(io.bundle.write) {
|
||||
// 检测写请求
|
||||
state := AXI4LiteStates.WriteAddr
|
||||
// 发起写事务
|
||||
addr := io.bundle.address
|
||||
write_data := io.bundle.write_data
|
||||
write_strobe := io.bundle.write_strobe
|
||||
state := AXI4LiteStates.WriteAddr
|
||||
AWVALID := true.B
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.ReadAddr) {
|
||||
// 发送读地址，等待从机响应
|
||||
// 发送读地址，直到从机准备好
|
||||
ARVALID := true.B
|
||||
io.channels.read_address_channel.ARADDR := addr
|
||||
when(io.channels.read_address_channel.ARREADY) {
|
||||
// 读地址握手完成
|
||||
ARVALID := false.B
|
||||
state := AXI4LiteStates.ReadData
|
||||
RREADY := true.B
|
||||
state := AXI4LiteStates.ReadData
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.ReadData) {
|
||||
// 等待读数据，保持RREADY为高
|
||||
// 保持 RREADY 高，等待从机 RVALID
|
||||
RREADY := true.B
|
||||
when(io.channels.read_data_channel.RVALID) {
|
||||
// 读数据握手完成
|
||||
read_data := io.channels.read_data_channel.RDATA
|
||||
RREADY := false.B
|
||||
read_valid := true.B
|
||||
@@ -338,33 +327,32 @@ class AXI4LiteMaster(addrWidth: Int, dataWidth: Int) extends Module {
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteAddr) {
|
||||
// 发送写地址，等待从机响应
|
||||
// 发送写地址，直到从机准备好
|
||||
AWVALID := true.B
|
||||
io.channels.write_address_channel.AWADDR := addr
|
||||
when(io.channels.write_address_channel.AWREADY) {
|
||||
// 写地址握手完成
|
||||
AWVALID := false.B
|
||||
state := AXI4LiteStates.WriteData
|
||||
WVALID := true.B
|
||||
state := AXI4LiteStates.WriteData
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteData) {
|
||||
// 发送写数据，保持WVALID为高
|
||||
// 发送写数据，直到从机接受
|
||||
WVALID := true.B
|
||||
io.channels.write_data_channel.WDATA := write_data
|
||||
io.channels.write_data_channel.WSTRB := write_strobe.asUInt
|
||||
when(io.channels.write_data_channel.WREADY) {
|
||||
// 写数据握手完成
|
||||
WVALID := false.B
|
||||
state := AXI4LiteStates.WriteResp
|
||||
BREADY := true.B
|
||||
state := AXI4LiteStates.WriteResp
|
||||
}
|
||||
}
|
||||
|
||||
is(AXI4LiteStates.WriteResp) {
|
||||
// 等待写响应，保持BREADY为高
|
||||
// 等待从机写响应
|
||||
BREADY := true.B
|
||||
when(io.channels.write_response_channel.BVALID) {
|
||||
// 写响应握手完成
|
||||
BREADY := false.B
|
||||
write_valid := true.B
|
||||
state := AXI4LiteStates.Idle
|
||||
|
||||
Reference in New Issue
Block a user