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Update Top.scala

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This commit is contained in:
PurplePower
2024-01-24 15:11:56 +08:00
parent b9294c0bd1
commit 55aff2d301
1 changed files with 5 additions and 5 deletions
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10
lab1/src/main/scala/board/z710/Top.scala
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@@ -31,14 +31,14 @@ class Top(binaryFilename: String = "say_goodbye.asmbin") extends Module {
val mem = Module(new Memory(Parameters.MemorySizeInWords)) val mem = Module(new Memory(Parameters.MemorySizeInWords))
// val hdmi_display = Module(new HDMIDisplay) // val hdmi_display = Module(new HDMIDisplay)
// val display = Module(new CharacterDisplay) // val display = Module(new CharacterDisplay)
val timer = Module(new Timer) // val timer = Module(new Timer)
val uart = Module(new Uart(frequency = 32_000000, baudRate = 115200)) // 31M or 32M is good, 33M more error val uart = Module(new Uart(frequency = 32_000000, baudRate = 115200)) // 31M or 32M is good, 33M more error
val dummy = Module(new Dummy) val dummy = Module(new Dummy)
// display.io.bundle <> dummy.io.bundle // display.io.bundle <> dummy.io.bundle
mem.io.bundle <> dummy.io.bundle mem.io.bundle <> dummy.io.bundle
mem.io.debug_read_address := 0.U mem.io.debug_read_address := 0.U
timer.io.bundle <> dummy.io.bundle // timer.io.bundle <> dummy.io.bundle
uart.io.bundle <> dummy.io.bundle uart.io.bundle <> dummy.io.bundle
io.tx := uart.io.txd io.tx := uart.io.txd
uart.io.rxd := io.rx uart.io.rxd := io.rx
@@ -60,9 +60,9 @@ class Top(binaryFilename: String = "say_goodbye.asmbin") extends Module {
withClock(CPU_tick.asClock) { withClock(CPU_tick.asClock) {
val cpu = Module(new CPU) val cpu = Module(new CPU)
cpu.io.interrupt_flag := Cat(uart.io.signal_interrupt, timer.io.signal_interrupt) // cpu.io.interrupt_flag := Cat(uart.io.signal_interrupt, timer.io.signal_interrupt)
cpu.io.csr_regs_debug_read_address := 0.U // cpu.io.csr_regs_debug_read_address := 0.U
cpu.io.regs_debug_read_address := 0.U // cpu.io.regs_debug_read_address := 0.U
cpu.io.debug_read_address := 0.U cpu.io.debug_read_address := 0.U
// cpu.io.memory_bundle.read_data := 0.U // cpu.io.memory_bundle.read_data := 0.U
cpu.io.instruction_valid := rom_loader.io.load_finished cpu.io.instruction_valid := rom_loader.io.load_finished