lab3截图和小更改

This commit is contained in:
2025-10-14 21:24:47 +08:00
parent 81adb30885
commit 525360669e
13 changed files with 6 additions and 22 deletions

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@@ -22,7 +22,6 @@ import riscv.core.PipelineRegister
import scala.math.pow
import scala.util.Random
class PipelineRegisterTest extends AnyFlatSpec with ChiselScalatestTester {
behavior of "Pipeline Register"
it should "be able to stall and flush" in {